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Christophe Bobda Vis

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*2009
52EEHarold Ishebabi, Philipp Mahr, Christophe Bobda, Martin Gebser, Torsten Schaub: Application of ASP for Automatic Synthesis of Flexible Multiprocessor Systems from Parallel Programs. LPNMR 2009: 598-603
51EEChristophe Bobda: Special issue on ReCoSoC 2007. Microprocessors and Microsystems - Embedded Hardware Design 33(1): 1 (2009)
50EESlavisa Jovanovic, Camel Tanougast, Christophe Bobda, Serge Weber: CuNoC: A dynamic scalable communication structure for dynamically reconfigurable FPGAs. Microprocessors and Microsystems - Embedded Hardware Design 33(1): 24-36 (2009)
49EEHarold Ishebabi, Christophe Bobda: Automated architecture synthesis for parallel programs on FPGA multiprocessor systems. Microprocessors and Microsystems - Embedded Hardware Design 33(1): 63-71 (2009)
2007
48 Gilles Sassatelli, Manfred Glesner, Christophe Bobda, Pascal Benoit: Proceedings of the 3rd International Workshop on Reconfigurable Communication-centric Systems-on-Chip, ReCoSoC 2007, Montpellier, France, June 2007 Univ. Montpellier II 2007
47EEHarding Djakou Chati, Felix Mühlbauer, Tim Braun, Christophe Bobda, Karsten Berns: Hardware/Software co-design of a key point detector on FPGA. FCCM 2007: 355-356
46EEHarding Djakou Chati, Felix Mühlbauer, Tim Braun, Christophe Bobda, Karsten Berns: SoPC architecture for a Key Point Detector. FPL 2007: 710-713
45EESlavisa Jovanovic, Camel Tanougast, Christophe Bobda, Serge Weber: CuNoC: A Scalable Dynamic NoC for Dynamically Reconfigurable FPGAs. FPL 2007: 753-756
44EELars Middendorf, Felix Mühlbauer, Georg Umlauf, Christophe Bobda: Embedded Vertex Shader in FPGA. IESS 2007: 155-164
43EEDominik Murr, Felix Mühlbauer, Falko Dressler, Christophe Bobda: Utilizing Reconfigurable Hardware to Optimize Workflows in Networked Nodes. IESS 2007: 373-386
42 Thomas Haller, Christophe Bobda: Adaptive Network for Multiprocessing in Programmable Logic Devices. ReCoSoC 2007: 106-110
41 Thomas Haller, José Rodrigo Azambuja, Christophe Bobda: Automatic Generation of Adaptive Multiprocessor Systems. ReCoSoC 2007: 192-193
40 Slavisa Jovanovic, Camel Tanougast, Christophe Bobda, Serge Weber: A Dynamic Communication Structure for Dynamically Reconfigurable FPGAs. ReCoSoC 2007: 98-105
39EEChristophe Bobda, Thomas Haller, Felix Mühlbauer, Dennis Rech, Simon Jung: Design of adaptive multiprocessor on chip systems. SBCCI 2007: 177-183
38EEMateusz Majer, Jürgen Teich, Ali Ahmadinia, Christophe Bobda: The Erlangen Slot Machine: A Dynamically Reconfigurable FPGA-based Computer. VLSI Signal Processing 47(1): 15-31 (2007)
2006
37 Mateusz Majer, Ali Ahmadinia, Christophe Bobda, Jürgen Teich: A Flexible Reconfiguration Manager for the Erlangen Slot Machine. ARCS Workshops 2006: 183-194
36EEFelix Mühlbauer, Christophe Bobda: Design and Implementation of an Object Tracker on a Reconfigurable System on Chip. IEEE International Workshop on Rapid System Prototyping 2006: 230
35EEKlaus Danne, Christophe Bobda: Dynamic reconfiguration of Distributed Arithmetic designs. IJES 2(1/2): 51-61 (2006)
2005
34 Christophe Bobda, Ali Ahmadinia, Kurapati Rajesham, Mateusz Majer, Adronis Niyonkuru: Partial Configuration Design and Implementation Challenges on Xilinx Virtex FPGAs. ARCS Workshops 2005: 61-66
33 Jan van der Veen, Sándor P. Fekete, Mateusz Majer, Ali Ahmadinia, Christophe Bobda, Frank Hannig, Jürgen Teich: Defragmenting the Module Layout of a Partially Reconfigurable Device. ERSA 2005: 92-104
32EEChristophe Bobda, Mateusz Majer, Ali Ahmadinia, Thomas Haller, André Linarth, Jürgen Teich, Sándor P. Fekete, Jan van der Veen: The Erlangen Slot Machine: A Highly Flexible FPGA-Based Reconfigurable Platform. FCCM 2005: 319-320
31 Christophe Bobda, Ali Ahmadinia, Mateusz Majer, Jürgen Teich, Sándor P. Fekete, Jan van der Veen: DyNoC: A Dynamic Infrastructure for Communication in Dynamically Reconfigurable Devices. FPL 2005: 153-158
30 Christophe Bobda, Mateusz Majer, Ali Ahmadinia, Thomas Haller, André Linarth, Jürgen Teich: The Erlangen Slot Machine: Increasing Flexibility in FPGA-Based Reconfigurable Platforms. FPT 2005: 37-42
29EEAli Ahmadinia, Christophe Bobda, Ji Ding, Mateusz Majer, Jürgen Teich, Sándor P. Fekete, Jan van der Veen: A Practical Approach for Circuit Routing on Dynamic Reconfigurable Devices. IEEE International Workshop on Rapid System Prototyping 2005: 84-90
28EEMateusz Majer, Christophe Bobda, Ali Ahmadinia, Jürgen Teich: Packet Routing in Dynamically Changing Networks on Chip. IPDPS 2005
27EETertulien Ndjountche, Fa-Long Luo, Christophe Bobda: A CMOS front-end architecture for hard-disk drive read-channel equalizer. ISCAS (3) 2005: 2184-2187
26EEChristophe Bobda: Building Up a Course in Reconfigurable Computing. MSE 2005: 7-8
25EEAli Ahmadinia, Christophe Bobda, Ji Ding, Mateusz Majer, Jürgen Teich, Sándor P. Fekete, Jan van der Veen: A Practical Approach for Circuit Routing on Dynamic Reconfigurable Devices CoRR abs/cs/0503066: (2005)
24EEJan van der Veen, Sándor P. Fekete, Ali Ahmadinia, Christophe Bobda, Frank Hannig, Jürgen Teich: Defragmenting the Module Layout of a Partially Reconfigurable Device CoRR abs/cs/0505005: (2005)
23EEChristophe Bobda, Ali Ahmadinia, Mateusz Majer, Jürgen Teich, Sándor P. Fekete, Jan van der Veen: DyNoC: A Dynamic Infrastructure for Communication in Dynamically Reconfigurable Devices CoRR abs/cs/0510039: (2005)
22EEChristophe Bobda, Ali Ahmadinia: Dynamic Interconnection of Reconfigurable Modules on Reconfigurable Devices. IEEE Design & Test of Computers 22(5): 443-451 (2005)
21EEChristophe Bobda: CoreMap: a rapid prototyping environment for distributed reconfigurable systems. IJES 1(1/2): 65-77 (2005)
20EEAli Ahmadinia, Christophe Bobda, Jürgen Teich: Online placement for dynamically reconfigurable devices. IJES 1(3/4): 165-178 (2005)
2004
19EEAli Ahmadinia, Christophe Bobda, Jürgen Teich: A Dynamic Scheduling and Placement Algorithm for Reconfigurable Hardware. ARCS 2004: 125-139
18 Christophe Bobda, Ali Ahmadinia, Jürgen Teich: Generation of Distributed Arithmetic Designs for Reconfigurable Application. ARCS Workshops 2004: 205-214
17EEChristophe Bobda, Mateusz Majer, Dirk Koch, Ali Ahmadinia, Jürgen Teich: A Dynamic NoC Approach for Communication in Reconfigurable Devices. FPL 2004: 1032-1036
16EEBrandon Blodget, Christophe Bobda, Michael Hübner, Adronis Niyonkuru: Partial and Dynamically Reconfiguration of Xilinx Virtex-II FPGAs. FPL 2004: 801-810
15EEAli Ahmadinia, Christophe Bobda, Sándor P. Fekete, Jürgen Teich, Jan van der Veen: Optimal Routing-Conscious Dynamic Placement for Reconfigurable Devices. FPL 2004: 847-851
14EEAli Ahmadinia, Christophe Bobda, Marcus Bednara, Jürgen Teich: A New Approach for On-line Placement on Reconfigurable Devices. IPDPS 2004
13EEKlaus Danne, Christophe Bobda: Dynamic Reconfiguration of Distributed Arithmetic Controllers: Design Space Exploration and Trade-Off Analysis. IPDPS 2004
12EEAli Ahmadinia, Christophe Bobda, Marcus Bednara, Jürgen Teich: Real-Time Configuration Code Decompression for Dynamic FPGA Self-Reconfiguration. IPDPS 2004
11EEAli Ahmadinia, Christophe Bobda, Dirk Koch, Mateusz Majer, Jürgen Teich: Task scheduling for heterogeneous reconfigurable computers. SBCCI 2004: 22-27
10EEAli Ahmadinia, Christophe Bobda, Sándor P. Fekete, Jürgen Teich, Jan van der Veen: Optimal Routing-Conscious Dynamic Placement for Reconfigurable Devices CoRR cs.DS/0406035: (2004)
2003
9EEAchim Rettberg, Mauro Cesar Zanella, Christophe Bobda, Thomas Lehmann: A Fully Self-Timed Bit-Serial Pipeline Architecture for Embedded Systems. DATE 2003: 11130-11131
8 Klaus Danne, Christophe Bobda, Heiko Kalte: Increasing Efficiency by Partial Hardware Reconfiguration: Case Study of a Multi-Controller System. Engineering of Reconfigurable Systems and Algorithms 2003: 147-153
7EEChristophe Bobda, Klaus Danne, André Linarth: Efficient Implementation of the Singular Value Decomposition on a Reconfigurable System. FPL 2003: 1123-1126
6EEKlaus Danne, Christophe Bobda, Heiko Kalte: Run-Time Exchange of Mechatronic Controllers Using Partial Hardware Reconfiguration. FPL 2003: 272-281
5EEAchim Rettberg, Mauro Cesar Zanella, Thomas Lehmann, Christophe Bobda: A New Approach of a Self-Timed Bit-Serial Synchronous Pipeline Architecture. IEEE International Workshop on Rapid System Prototyping 2003: 71-77
2002
4 Christophe Bobda: Temporal Partitioning and Sequencing of Dataflow Graphs on Reconfigurable Systems. DIPES 2002: 185-194
3EEChristophe Bobda, Nils Steenbock: A Rapid Prototyping Environment for Distributed Reconfigurable Systems. IEEE International Workshop on Rapid System Prototyping 2002: 153-158
2001
2EEChristophe Bobda, Nils Steenbock: Singular Value Decomposition on Distributed Reconfigurable Systems. IEEE International Workshop on Rapid System Prototyping 2001: 38-43
2000
1EEChristophe Bobda, Thomas Lehmann: Efficient Building of Word Recongnizer in FPGAs for Term-Document Matrices Construction. FPL 2000: 759-768

Coauthor Index

1Ali Ahmadinia [10] [11] [12] [14] [15] [17] [18] [19] [20] [22] [23] [24] [25] [28] [29] [30] [31] [32] [33] [34] [37] [38]
2José Rodrigo Azambuja [41]
3Marcus Bednara [12] [14]
4Pascal Benoit [48]
5Karsten Berns [46] [47]
6Brandon Blodget [16]
7Tim Braun [46] [47]
8Harding Djakou Chati [46] [47]
9Klaus Danne [6] [7] [8] [13] [35]
10Ji Ding [25] [29]
11Falko Dressler [43]
12Sándor P. Fekete [10] [15] [23] [24] [25] [29] [31] [32] [33]
13Martin Gebser [52]
14Manfred Glesner [48]
15Thomas Haller [30] [32] [39] [41] [42]
16Frank Hannig [24] [33]
17Michael Hübner [16]
18Harold Ishebabi [49] [52]
19Slavisa Jovanovic [40] [45] [50]
20Simon Jung [39]
21Heiko Kalte [6] [8]
22Dirk Koch [11] [17]
23Thomas Lehmann [1] [5] [9]
24André Linarth [7] [30] [32]
25Fa-Long Luo [27]
26Philipp Mahr [52]
27Mateusz Majer [11] [17] [23] [25] [28] [29] [30] [31] [32] [33] [34] [37] [38]
28Lars Middendorf [44]
29Felix Mühlbauer [36] [39] [43] [44] [46] [47]
30Dominik Murr [43]
31Tertulien Ndjountche [27]
32Adronis Niyonkuru [16] [34]
33Kurapati Rajesham [34]
34Dennis Rech [39]
35Achim Rettberg [5] [9]
36Gilles Sassatelli [48]
37Torsten Schaub [52]
38Nils Steenbock [2] [3]
39Camel Tanougast [40] [45] [50]
40Jürgen Teich [10] [11] [12] [14] [15] [17] [18] [19] [20] [23] [24] [25] [28] [29] [30] [31] [32] [33] [37] [38]
41Georg Umlauf [44]
42Jan van der Veen [10] [15] [23] [24] [25] [29] [31] [32] [33]
43Serge Weber [40] [45] [50]
44Mauro Cesar Zanella [5] [9]

Colors in the list of coauthors

Copyright © Tue Nov 3 08:52:44 2009 by Michael Ley (ley@uni-trier.de)