| * | 2008 |
| 12 | EE | Sailesh Kumar,
Jonathan S. Turner,
Patrick Crowley:
Peacock Hashing: Deterministic and Updatable Hashing for High Performance Networking.
INFOCOM 2008: 101-105 |
| 2007 |
| 11 | EE | Sailesh Kumar,
Balakrishnan Chandrasekaran,
Jonathan S. Turner,
George Varghese:
Curing regular expressions matching algorithms from insomnia, amnesia, and acalculia.
ANCS 2007: 155-164 |
| 10 | EE | Sailesh Kumar,
Jonathan S. Turner,
Patrick Crowley,
Michael Mitzenmacher:
HEXA: Compact Data Structures for Faster Packet Processing.
ICNP 2007: 246-255 |
| 9 | EE | Jonathan S. Turner,
Patrick Crowley,
John D. DeHart,
Amy Freestone,
Brandon Heller,
Fred Kuhns,
Sailesh Kumar,
John W. Lockwood,
Jing Lu,
Michael Wilson,
Charles Wiseman,
David Zar:
Supercharging planetlab: a high performance, multi-application, overlay network platform.
SIGCOMM 2007: 85-96 |
| 2006 |
| 8 | EE | Sailesh Kumar,
Michela Becchi,
Patrick Crowley,
Jonathan S. Turner:
CAMP: fast and efficient IP lookup architecture.
ANCS 2006: 51-60 |
| 7 | EE | Sailesh Kumar,
Jonathan S. Turner,
John Williams:
Advanced algorithms for fast and scalable deep packet inspection.
ANCS 2006: 81-92 |
| 6 | EE | Sailesh Kumar,
John Maschmeyer,
Patrick Crowley:
Exploiting locality to ameliorate packet queue contention and serialization.
Conf. Computing Frontiers 2006: 279-290 |
| 5 | EE | Sailesh Kumar,
Sarang Dharmapurikar,
Fang Yu,
Patrick Crowley,
Jonathan S. Turner:
Algorithms to accelerate multiple regular expressions matching for deep packet inspection.
SIGCOMM 2006: 339-350 |
| 2005 |
| 4 | EE | Sailesh Kumar,
Patrick Crowley:
Segmented hash: an efficient hash table implementation for high performance networking subsystems.
ANCS 2005: 91-103 |
| 3 | EE | Sailesh Kumar,
Patrick Crowley,
Jonathan S. Turner:
Design of Randomized Multichannel Packet Storage for High Performance Routers.
Hot Interconnects 2005: 100-106 |
| 2 | EE | Sailesh Kumar,
Jonathan S. Turner,
Patrick Crowley:
Addressing Queuing Bottlenecks at High Speeds.
Hot Interconnects 2005: 107-113 |
| 2002 |
| 1 | EE | Raja Venkatesh,
Sailesh Kumar,
Joji Philip,
Sunil Shukla:
A Fault Modeling Technique to Test Memory BIST Algorithms.
MTDT 2002: 109-116 |