| |
| * | 2008 | |
|---|---|---|
| 4 | EE | Yanmei Qu, Yun He, Shunliang Mei: A Novel Cost-Effective and Programmable VLSI Architecture of CAVLC Decoder for H.264/AVC. Signal Processing Systems 50(1): 41-51 (2008) |
| 3 | EE | Yanmei Qu, Shunliang Mei, Yun He: A Cost-effective VLD Architecture for MPEG-2 and AVS. Signal Processing Systems 52(1): 95-109 (2008) |
| 2007 | ||
| 2 | EE | Yanmei Qu, Yu Li, Shunliang Mei: A Cost-Effective VLSI Architecture of VLD for MPEG-2 and AVS. ICME 2007: 1619-1622 |
| 1 | EE | Yu Li, Yanmei Qu, Yun He: Memory Cache Based Motion Compensation Architecture for HDTV H.264/AVC Decoder. ISCAS 2007: 2906-2909 |
| 1 | Yun He | [1] [3] [4] |
| 2 | Yu Li | [1] [2] |
| 3 | Shunliang Mei | [2] [3] [4] |