| |
| 2006 | ||
|---|---|---|
| 5 | EE | Sridhar Rajagopal, Joseph R. Cavallaro: Truncated Online Arithmetic with Applications to Communication Systems. IEEE Trans. Computers 55(10): 1240-12529 (2006) |
| 2004 | ||
| 4 | EE | Sridhar Rajagopal, Joseph R. Cavallaro, Scott Rixner: Design Space Exploration for Real-Time Embedded Stream Processors. IEEE Micro 24(4): 54-66 (2004) |
| 2001 | ||
| 3 | EE | Sridhar Rajagopal, Joseph R. Cavallaro: On-line Arithmetic for Detection in Digital Communication Receivers. IEEE Symposium on Computer Arithmetic 2001: 257-265 |
| 2 | EE | Sridhar Rajagopal, Joseph R. Cavallaro: A bit-streaming, pipelined multiuser detector for wireless communication receivers. ISCAS (4) 2001: 128-131 |
| 2000 | ||
| 1 | EE | Sridhar Rajagopal, Srikrishna Bhashyam, Joseph R. Cavallaro, Behnaam Aazhang: Efficient VLSI Architectures for Baseband Signal Processing in Wireless Base-Station Receivers. ASAP 2000: 173-184 |
| 1 | Behnaam Aazhang | [1] |
| 2 | Srikrishna Bhashyam | [1] |
| 3 | Joseph R. Cavallaro | [1] [2] [3] [4] [5] |
| 4 | Scott Rixner | [4] |