| * | 2008 |
|---|
| 9 | EE | Graham Schelle,
Dirk Grunwald:
Exploring FPGA network on chip implementations across various application and network loads.
FPL 2008: 41-46 |
| 8 | EE | Aveek Dutta,
Jeff Fifield,
Graham Schelle,
Dirk Grunwald,
Douglas C. Sicker:
An intelligent physical layer for cognitive radio networks.
WICON 2008: 12 |
| 2007 |
|---|
| 7 | EE | Graham Schelle,
Dirk Grunwald:
Abstracting Modern FCCMs To Provide a Single Interface to Architectural Resources.
FCCM 2007: 305-308 |
| 6 | EE | Graham Schelle,
Jeff Fifield,
Dirk Grunwald:
A Software Defined Radio Application Utilizing Modern FPGAs and NoC Interconnects.
FPL 2007: 177-182 |
| 2006 |
|---|
| 5 | EE | David A. Penry,
Daniel Fay,
David Hodgdon,
Ryan Wells,
Graham Schelle,
David I. August,
Dan Connors:
Exploiting parallelism and structure to accelerate the simulation of chip multi-processors.
HPCA 2006: 29-40 |
| 2005 |
|---|
| 4 | EE | Graham Schelle,
Dirk Grunwald:
CUSP: a modular framework for high speed network applications on FPGAs.
FPGA 2005: 246-257 |
| 2004 |
|---|
| 3 | EE | Chidamber Kulkarni,
Gordon J. Brebner,
Graham Schelle:
Mapping a domain specific language to a platform FPGA.
DAC 2004: 924-927 |
| 2 | EE | Graham Schelle,
Dirk Grunwald:
Automated Speculation and Parallelism in High Performance Network Applications.
FPL 2004: 1175 |
| 2003 |
|---|
| 1 | | Marco Gruteser,
Graham Schelle,
Ashish Jain,
Richard Han,
Dirk Grunwald:
Privacy-Aware Location Sensor Networks.
HotOS 2003: 163-168 |
