Jeegar Tilak Shah Vis

*	2007
2	EE	Jeegar Tilak Shah, Marius Evers, Jeff Trull, Alper Halbutogullari: Circuit optimization for leakage power reduction using multi-threshold voltages for high performance microprocessors. ISPD 2007: 67-74
	2000
1	EE	Jeegar Tilak Shah, Madhav P. Desai, Sugata Sanyal: Inductance Characterization of Small Interconnects Using Test-Signal Method. VLSI Design 2000: 376-

Coauthor Index

1	Madhav P. Desai	[1]
2	Marius Evers	[2]
3	Alper Halbutogullari	[2]
4	Sugata Sanyal	[1]
5	Jeff Trull	[2]

Colors in the list of coauthors