| * | 2007 |
|---|
| 36 | EE | V. Rhymend Uthariaraj,
T. C. Rangarajan,
S. Srinivasan:
A Security-Centric Comparative Study of PLEASE with Existing GKM Protocols.
CNSR 2007: 192-202 |
| 35 | | S. P. Alampalayam,
Anup Kumar,
J. H. Graham,
S. Srinivasan:
Intruder Identification and Response Framework for Mobile Ad hoc Networks.
Computers and Their Applications 2007: 260-265 |
| 34 | EE | Kannan Gaddam,
Nitin Chandrachoodan,
S. Srinivasan:
Rapid Abstract Control Model for Signal Processing Implementation.
SiPS 2007: 418-423 |
| 33 | EE | S. Srinivasan,
J. Samuelsson,
W. Bastiaan Kleijn:
Codebook-Based Bayesian Speech Enhancement for Nonstationary Environments.
IEEE Transactions on Audio, Speech & Language Processing 15(2): 441-452 (2007) |
| 32 | EE | S. Srinivasan,
DeLiang Wang:
Transforming Binary Uncertainties for Robust Speech Recognition.
IEEE Transactions on Audio, Speech & Language Processing 15(7): 2130-2140 (2007) |
| 2006 |
|---|
| 31 | EE | Srinivasan Parthasarathy,
Sameep Mehta,
S. Srinivasan:
Robust periodicity detection algorithms.
CIKM 2006: 874-875 |
| 30 | EE | Kavish Seth,
K. N. Viswajith,
S. Srinivasan,
V. Kamakoti:
Ultra Folded High-Speed Architectures for Reed-Solomon Decoders.
VLSI Design 2006: 517-520 |
| 29 | EE | S. Srinivasan,
J. Samuelsson,
W. Bastiaan Kleijn:
Codebook driven short-term predictor parameter estimation for speech enhancement.
IEEE Transactions on Audio, Speech & Language Processing 14(1): 163-176 (2006) |
| 28 | EE | P. Rajesh Kumar,
K. Sridharan,
S. Srinivasan:
A parallel algorithm, architecture and FPGA realization for landmark determination and map construction in a planar unknown environment.
Parallel Computing 32(3): 205-221 (2006) |
| 27 | EE | Bin Xie,
Anup Kumar,
Dharma P. Agrawal,
S. Srinivasan:
Secured macro/micro-mobility protocol for multi-hop cellular IP.
Pervasive and Mobile Computing 2(2): 111-136 (2006) |
| 2005 |
|---|
| 26 | EE | S. Ramachandran,
S. Srinivasan:
Design and FPGA implementation of an MPEG based video scalar with reduced on-chip memory utilization.
Journal of Systems Architecture 51(6-7): 435-450 (2005) |
| 2004 |
|---|
| 25 | EE | J. D. Kranthi Kumar,
S. Srinivasan:
A Novel VLSI Architecture to Implement Region Merging Algorithm for Image Segmentation.
DSD 2004: 620-623 |
| 24 | EE | Kavish Seth,
P. Rangarajan,
S. Srinivasan,
V. Kamakoti,
V. Bala Kuteshwar:
A Parallel Architectural Implementation Of The New Three-Step Search Algorithm For Block Motion Estimation.
VLSI Design 2004: 1071-1076 |
| 23 | EE | Jian Liang,
Andrew Laffely,
S. Srinivasan,
Russell Tessier:
An architecture and compiler for scalable on-chip communication.
IEEE Trans. VLSI Syst. 12(7): 711-726 (2004) |
| 22 | EE | S. Srinivasan:
Role of trust in e-business success.
Inf. Manag. Comput. Security 12(1): 66-72 (2004) |
| 2003 |
|---|
| 21 | EE | S. Ramachandran,
S. Srinivasan:
Design and FPGA Implementation of a Video Scalar with on-chip reduced memory utilization.
DSD 2003: 206-213 |
| 20 | | S. Srinivasan,
P. Thambidurai:
Phrase Based Approach for Document Representation.
IC-AI 2003: 683-688 |
| 19 | EE | Kumud Prakash Gupta,
S. Srinivasan:
Reduced Memory Implementation of Modified Serial Watershed Algorithm Based On Ordered Queue.
ITCC 2003: 514-518 |
| 18 | EE | A. Durga Kishore,
S. Srinivasan:
A Distributed Memory Architecture for Morphological Image Processing.
ITCC 2003: 536-540 |
| 17 | EE | Srikar Movva,
S. Srinivasan:
A Novel Architecture for Lifting-Based Discrete Wavelet Transform for JPEG2000 Standard suitable for VLSI.
VLSI Design 2003: 202-207 |
| 2002 |
|---|
| 16 | EE | Kavish Seth,
S. Srinivasan:
VLSI Implementation of 2-D DWT/IDWT Cores Using 9/7-Tap Filter Banks Based on the Non-Expansive Symmetric Extension Scheme.
VLSI Design 2002: 435-440 |
| 15 | EE | S. Ramachandran,
S. Srinivasan:
A fast, FPGA-based MPEG-2 video encoder with a novel automatic quality control scheme.
Microprocessors and Microsystems 25(9-10): 449-457 (2002) |
| 2001 |
|---|
| 14 | EE | S. Ramachandran,
S. Srinivasan:
FPGA implementation of a novel, fast motion estimation algorithm for real-time video compression.
FPGA 2001: 213-219 |
| 1999 |
|---|
| 13 | EE | S. Srinivasan:
Fast Partial Search Solution to the 3D SFM Problem.
ICCV 1999: 528-535 |
| 12 | EE | S. Ramachandran,
S. Srinivasan,
R. Chen:
EPLD-based architecture of real time 2D-discrete cosine transform and quantization for image compression.
ISCAS (3) 1999: 375-378 |
| 11 | EE | D. V. R. Murthy,
S. Ramachandran,
S. Srinivasan:
Parallel Implementation of 2D-Discrete Cosine Transform Using EPLDs.
VLSI Design 1999: 336-339 |
| 10 | EE | S. Srinivasan,
Niraj K. Jha:
Safety and Reliability Driven Task Allocation in Distributed Systems.
IEEE Trans. Parallel Distrib. Syst. 10(3): 238-251 (1999) |
| 1997 |
|---|
| 9 | | S. Srinivasan,
Malathi Veeraraghavan:
DIVA: A DIstributed & Dynamic VP Management Algorithm.
Integrated Network Management 1997: 287-298 |
| 8 | EE | S. Srinivasan,
Brian L. Dos Santos,
Janis L. Gogan,
Andrew L. Wright:
Electronic commerce (panel).
SIGCPR 1997: 250 |
| 1996 |
|---|
| 7 | | R. Srivaths,
S. Srinivasan:
Content Based Image Retrieval.
Multimedia Technology and Applications 1996: 127-130 |
| 6 | | Anand Rangarajan,
S. Srinivasan:
Personalized Trailer Making of MPEG Sequences.
Multimedia Technology and Applications 1996: 451-455 |
| 1995 |
|---|
| 5 | | S. Sudarsanam,
S. Srinivasan:
Searching for protein loops in parallel.
Computer Applications in the Biosciences 11(6): 591-593 (1995) |
| 1994 |
|---|
| 4 | | S. Srinivasan:
A Critical Look At Some Ada Features.
SIGPLAN Notices 29(3): 18-22 (1994) |
| 1990 |
|---|
| 3 | | S. Srinivasan:
Compiler Design for Sets in PASCAL.
SIGPLAN Notices 25(1): 23-24 (1990) |
| 1988 |
|---|
| 2 | EE | S. Srinivasan,
Pradip Dey,
Yoichi Hayashi:
A flexible interactive control structure for rule-based systems.
ACM Conference on Computer Science 1988: 447-453 |
| 1986 |
|---|
| 1 | EE | S. Srinivasan:
A faster recovery from hash table (abstract).
ACM Conference on Computer Science 1986: 478 |
